Avago Technologies LSI53C895A - Manual (Page 10)

x Contents
Chapter 6 Electrical Specifications
6.1 DC Characteristics 6-1
6.2 TolerANT Technology Electrical Characteristics 6-8
6.3 AC Characteristics 6-12
6.4 PCI and External Memory Interface Timing Diagrams 6-14
6.4.1 Target Timing 6-15
6.4.2 Initiator Timing 6-22
6.4.3 External Memory Timing 6-39
6.5 SCSI Timing Diagrams 6-56
6.6 Package Diagrams 6-64
6.6.1 LSI53C895A vs. LSI53C895 Pin/Ball Differences 6-71
Appendix A Register Summary
Appendix B External Memory Interface Diagram Examples
Index
Customer Feedback
Figures
1.1 Typical LSI53C895A System Application 1-2
1.2 Typical LSI53C895A Board Application 1-3
2.1 LSI53C895A Block Diagram 2-2
2.2 Parity Checking/Generation 2-29
2.3 DMA FIFO Sections 2-30
2.4 LSI53C895A Host Interface SCSI Data Paths 2-31
2.5 8-Bit HVD Wiring Diagram for Ultra2 SCSI 2-37
2.6 Regulated Termination for Ultra2 SCSI 2-39
2.7 Determining the Synchronous Transfer Rate 2-41
2.8 Block Move and Chained Block Move Instructions 2-52
3.1 LSI53C895A Functional Signal Grouping 3-2
5.1 SCRIPTS Overview 5-5
6.1 LVD Driver 6-3
6.2 LVD Receiver 6-4