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Figure6.2 lvd receiver, Table 6.5 diffsens scsi signal, Table 6.6 input capacitance – Avago Technologies LSI53C895A User Manual

Page 264: Lvd receiver, Initiator asynchronous receive, Diffsens scsi signal, Input capacitance

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6-4

Electrical Specifications

Figure 6.2

LVD Receiver

V

CM

+

+

+

+

V

I

2

V

I

2

Table 6.5

DIFFSENS SCSI Signal

Symbol

Parameter

Min

Max

Unit

Test Conditions

1

1. Functional test specified for each mode (V

IH

, V

S

, V

IL

).

V

IH

HVD sense voltage

2.4

5.5

V

Note 1

V

S

LVD sense voltage

0.7

1.9

V

Note 1

V

IL

SE sense voltage

V

SS

0.3

0.5

V

Note 1

I

IN

Input leakage

10

10

µ

A

V

PIN

= 0 V, 5.25 V

Table 6.6

Input Capacitance

Symbol

Parameter

Min

Max

Unit

Test Conditions

C

I

Input capacitance of input pads

7

pF

C

IO

Input capacitance of I/O pads

15

pF