Avago Technologies LSI53C895A - Manual (Page 62)

2-36 Functional Description
ACK
−
, MSG
−
, C_D
−
, I/O
−
, ATN
−
, SD[7:0]
−
, and SDP0
−
lines is 680
Ω
when the Active Negation portion of LSI Logic TolerANT technology is
not enabled. When TolerANT is enabled, the recommended resistor
value on the REQ
−
, ACK
−
, SD[7:0]
−
, and SDP0
−
signals is 1.5 k
Ω
. The
electrical characteristics of these pins change when TolerANT is enabled,
permitting a higher resistor value.
To interface the LSI53C895A to the SN75976A, connect the positive pins
in the SCSI LVD pair of the LSI53C895A directly to the transceiver
enables (xDE/RE/). These signals control the direction of the channels
on the SN75976A.
The SCSI bidirectional control and data pins (SD[7:0]
−
SDP0
−
, SREQ
−, =
SACK
−
, SMSG
−
, SI_O
−
, SC_D, and ATN
−
) of the LSI53C895A connect
to the bidirectional data pins (nA) of the SN75976A with a pull-up
resistor. The pull-up value should be no lower than the transceiver I
OL
can tolerate, but not so high as to cause RC timing problems. The three
remaining pins, SSEL
−
, SBSY
−
and SRST
−
, are connected to the
SN75976A with a pull-down resistor. The pull-down resistors are required
when the pins (nA) of the SN75976A are configured as inputs. When the
data pins are inputs, the resistors provide a bias voltage to both the
LSI53C895A pins (SSEL
−
, SBSY
−
, and SRST
−
) and the SN75976A data
pins. Because the SSEL
−
, SBSY
−
, and SRST
−
pins on the LSI53C895A
are inputs only, this configuration allows for the SSEL
−
, SBSY
−
, and
SRST
−
SCSI signals to be asserted on the SCSI bus.
Note: The differential pairs on the SCSI bus are reversed when
connected to the SN75976A, due to the active low nature
of the SCSI bus.
8-Bit/16-Bit SCSI and the HVD Interface – In an 8-bit SCSI bus, the
SD[15:8] pins on the LSI53C895A should be pulled up with a 1.5 k
Ω
resistor or terminated like the rest of the SCSI bus lines. This is very
important, as errors may occur during reselection if these lines are left
floating.