Expansion rom base address – Avago Technologies LSI53C895A User Manual
Page 120
4-12
Registers
If the external serial EEPROM interface is enabled
(MAD[7] is LOW), this register is automatically loaded at
power-up from the external serial EEPROM and will
contain the value downloaded from the serial EEPROM
or a value of 0x0000 if the download fails.
If the external serial EEPROM is disabled (MAD[7] pulled
HIGH), the register returns a value of 0x1000. The 16-bit
value that should be stored in the external serial
EEPROM is vendor specific. Please see the
in
for additional
information on downloading a value for this register.
In addition, if the
register
(0x48–0x4B) is enabled and unlocked then this register
will contain the value that is written into the
register. Please see
SSVID/SSID Loading Mechanism,”
in
for
additional information.
Registers: 0x30–0x33
Expansion ROM Base Address
Read/Write
ERBA
Expansion ROM Base Address
[31:0]
This four-byte register handles the base address and size
information for the expansion ROM. It functions exactly
like the
Base Address Register Zero (I/O)
and One
(Memory) registers, except that the encoding of the bits
is different. The upper 21 bits correspond to the upper
21 bits of the expansion ROM base address.
The expansion ROM Enable bit, bit 0, is the only bit
defined in this register. This bit is used to control whether
or not the device accepts accesses to its expansion
ROM. When the bit is set, address decoding is enabled,
and a device is used with or without an expansion ROM
depending on the system configuration. To access the
external memory interface, also set the Memory Space
bit in the
register.
31
0
ERBA
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0