Avago Technologies LSI53C895A - Manual (Page 102)

3-14 Signal Descriptions
3.5 Flash ROM and Memory Interface Signals
Table 3.12 describes the Flash ROM and Memory Interface signals.
Table 3.12 Flash ROM and Memory Interface Signals
Name PQFP BGA Pos Type Strength Description
MWE/ 188 N2 O 4 mA Memory Write Enable. This pin is
used as a write enable signal to an
external flash memory.
MCE/ 191 R1 O 4 mA Memory Chip Enable. This pin is
used as a chip enable signal to an
external EEPROM or flash memory
device.
MOE/ 189 N3 O 4 mA Memory Output Enable. This pin is
used as an output enable signal to
an external EEPROM or flash
memory during read operations. It is
also used to test the connectivity of
the LSI53C895A signals in test
mode.
MAC/_
TESTOUT 79 K19 O 16 mA Memory Access Control. This pin
can be programmed to indicate local
or system memory accessed
(non-PCI applications). It is also
used to test the connectivity of the
LSI53C895A signals in test mode.
MAS0/ 186 M2 O 4 mA Memory Address Strobe 0. This
pin is used to latch in the least
significant address byte (bits [7:0])
of an external EEPROM or flash
memory. Since the LSI53C895A
moves addresses eight bits at a
time, this pin connects to the clock
of an external bank of flip-flops
which are used to assemble up to a
20-bit address for the external
memory.