Avago Technologies LSI53C895A - Manual (Page 339)

Register Summary A-3
Chip Test Two (CTEST2) 0x1A Read Only (bit 3
write) 4-55
Chip Test Zero (CTEST0) 0x18 Read/Write 4-54
Cumulative SCSI Byte Count (CSBC) 0xDC–0xDF Read/Write 4-112
Data Structure Address (DSA) 0x10–0x13 Read/Write 4-48
DMA Byte Counter (DBC) 0x24–0x26 Read/Write 4-64
DMA Command (DCMD) 0x27 Read/Write 4-65
DMA Control (DCNTL) 0x3B Read/Write 4-71
DMA FIFO (DFIFO) 0x20 Read/Write 4-58
DMA Interrupt Enable (DIEN) 0x39 Read/Write 4-70
DMA Mode (DMODE) 0x38 Read/Write 4-67
DMA Next Address (DNAD) 0x28–0x2B Read/Write 4-65
DMA Next Address 64 (DNAD64) 0xB8–0xBB Read/Write 4-107
DMA SCRIPTS Pointer (DSP) 0x2C–0x2F Read/Write 4-65
DMA SCRIPTS Pointer Save (DSPS) 0x30–0x33 Read/Write 4-66
DMA Status (DSTAT) 0x0C Read Only 4-40
DSA Relative Selector (DRS) 0xAC–0xAF Read/Write 4-105
Dynamic Block Move Selector (DBMS) 0xB4–0xB7 Read/Write 4-107
Entry Storage Address (ESA) 0xD0–0xD3 Read/Write 4-111
General Purpose (GPREG0) 0x07 Read/Write 4-36
General Purpose One (GPREG1) 0x5B Read/Write 4-102
General Purpose Pin Control One (GPCNTL1) 0x5A Read/Write 4-102
General Purpose Pin Control Zero (GPCNTL0) 0x47 Read/Write 4-84
Instruction Address (IA) 0xD4–0xD7 Read/Write 4-111
Interrupt Status One (ISTAT1) 0x15 Read/Write 4-52
Interrupt Status Zero (ISTAT0) 0x14 Read/Write 4-48
Table A.2 LSI53C895A SCSI Register Map (Cont.)
Register Name Address Read/Write Page