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Scratch register b (scratchb), Scratch, Register b (scratchb) – Avago Technologies LSI53C895A User Manual

Page 211: Registers: 0x5c–0x5f, Registers: 0x60–x9f

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SCSI Registers

4-103

Registers: 0x5C–0x5F

Scratch Register B (SCRATCHB)
Read/Write

SCRATCHB

Scratch Register B

[31:0]

This is a general purpose user definable scratch pad
register. Apart from CPU access, only register
Read/Write and Memory Moves directed at the
SCRATCH register will alter its contents. The power-up
values are indeterminate. A special mode of this register
can be enabled by setting the PCI Configuration Into
Enable bit in the

Chip Test Two (CTEST2)

register. If this

bit is set, the SCRATCH B register returns bits [31:13] of
the SCRIPTS RAM PCI

Base Address Register Two

(SCRIPTS RAM)

in bits [31:13] of the SCRATCH B

register when read. When read, bits [12:0] of SCRATCH
B will always return zeros in this mode. Writes to the
SCRATCH B register are unaffected. Resetting the PCI
Configuration Into Enable bit causes the SCRATCH B
register to return to normal operation.

Registers: 0x60–x9F

Scratch Registers C–R (SCRATCHC–SCRATCHR)
Read/Write

These are general purpose user definable scratch pad registers. Apart
from CPU access, only register read/write, memory moves and Load and
Stores directed at a SCRATCH register will alter its contents. The
power-up values are indeterminate.

31

0

SCRATCHB

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x