Altera PCI Compiler - Manual (Page 343)

Altera Corporation User Guide Version 11.1 8–13
October 2011 PCI Compiler
Testbench
To model different target terminations, use the following three input
signals:
■ trgt_tranx_retry —The target transactor retries the memory
transaction if trgt_tranx_retry is set to one
■ trgt_tranx_discA —The target transactor terminates the memory
transaction with data if trgt_tranx_discA is set to one
■ trgt_tranx_discB —The target transactor terminates the memory
transaction with a disconnect without data if trgt_tranx_discB
is set to one
The target transactor has two main sections:
■ FILE IO
■ PROCEDURES (VHDL) and TASKS (Verilog HDL)
FILE IO section
Upon reset, this section initializes the target transactor memory array
with the contents of the trgt_tranx_mem_init.dat file, which must be in
the project's working directory. Each line in the trgt_tranx_mem_init.dat
file corresponds to a memory location, the first line corresponding to
offset "000". The number of lines defined by the address_lines
parameter in the target transactor source code should be equal to number
of lines in the trgt_tranx_mem_init.dat file. If the number of lines in
trgt_tranx_mem_init.dat
file is less than the number of lines defined by
the address_lines parameter, the remaining lines in the memory array
are initialized to 0.
PROCEDURES and TASKS sections
The PROCEDURES section (VHDL) and the corresponding TASKS
section (Verilog HDL) define the events to be executed for the decoded
PCI transaction. These sections are fully documented in the source code.
You can modify the procedures or tasks to introduce different variations
in the PCI transactions as required by your application. You can also
create new procedures or tasks that are not currently implemented in the
target transactor by using the existing procedures or tasks as an example.
Bus Monitor (monitor)
The bus monitor displays PCI transactions and information messages to
the simulator's console window and in the log.txt file when an event
occurs on the PCI bus. The bus monitor also sends the PCI transaction
status to the master transactor. The bus monitor reports the following
messages: