Altera PCI Compiler - Manual (Page 269)

Altera Corporation User Guide Version 11.1 7–1
October 2011
7. Functional Description
This chapter provides specification details for the PCI Compiler with
SOPC Builder flow, including:
■ Functional Overview
■ Interface Signals
■ PCI Bus Commands
■ PCI Target Operation
■ PCI Master Operation
■ PCI Host-Bridge Operation
■ Altera-Provided PCI Bus Arbiter
■ Interrupts
■ Control & Status Registers
Functional
Overview The PCI Compiler with SOPC Builder flow uses the PCI-Avalon ™ bridge
to connect the PCI bus to the on-chip system interconnect fabric, allowing
you to easily create simple or complex PCI systems that include one or
more of the SOPC Builder components.
Because the PCI Compiler with SOPC Builder flow uses a predefined
interconnect, system development is completely driven by the SOPC
Builder graphical user interface (GUI). For example, you specify bridge
and component parameterization options, and the PCI Compiler wizard
sets up the bridge’s structure, component features, and system-wide
interconnect.
To make a complete PCI-Avalon bridge, the PCI Compiler instantiates
the Altera pci_t32, pci_t64, pci_mt32, or pci_mt64 MegaCore
function as needed per user specifications.
The interconnect—which contains logic to manage system-wide
connectivity—connects all components that make up the user-specified
SOPC Builder system. For example, when the targeted Altera
device is
operating in the PCI Master/Target Peripheral mode, the PCI-Avalon
bridge (via the interconnect) is managing the connectivity of multiple
master and slave components.