Altera PCI Compiler - Manual (Page 218)

4–8 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
Testbench Specifications
The bus monitor informs the master transactor of a successful data
transaction or if the target has terminated the transaction.
Refer to the
source code to see how the master transactor uses these termination
signals from the bus monitor.
The PCI testbench master transactor's PROCEDURES and TASKS
sections implement basic PCI transaction functionality. If your
application requires different functionality, modify the events to change
the behavior of the master transactor. Additionally, you can create new
procedures or tasks in the master transactor using the existing events as
an example.
INITIALIZATION Section
This user-defined section defines the parameters and reset length of your
PCI bus on power-up. Specifically, the system should reset the bus and
write the configuration space of the PCI agents. You can modify the
master transactor INITIALIZATION section to match your system
requirements by changing the time the system reset is asserted and
modifying the data written in the configuration space of the PCI agents.
USER COMMANDS Section
The master transactor USER COMMANDS section contains the
commands that initiate the PCI transactions you want to run for your
tests. The list of events that are executed by these commands is defined in
the PROCEDURES and TASKS sections. Customize the USER
COMMANDS section to execute the sequence of commands as needed to
test your design.
Table 4–6 shows the commands the master transactor supports.
Table 4–6. Supported Master Transactor Commands
Command Name Action
cfg_rd Performs a configuration read
cfg_wr Performs a configuration write
mem_wr_32 Performs a 32-bit memory write
mem_rd_32 Performs a 32-bit memory read
mem_wr_64 Performs a 64-bit memory write
mem_rd_64 Performs a 64-bit memory read
io_rd Performs an I/O read
io_wr Performs an I/O write