Altera PCI Compiler - Manual (Page 214)

4–4 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
PCI Testbench Files
Table 4–2 describes the reference design files provided in the local_bfm
directory, For more information on these files refer to “Local Reference
Design” on page 4–15 .
The example directory ( Table 4–3 ) contains the following subgroups of
files:
■ Testbench files modified to simulate the reference design provided
in local_bfm
■ A top-level design file
■ Simulation scripts
Table 4–2. Files Contained in the local_bfm Directory
File (1) Description
dma (2) This module serves as a direct memory access (DMA)
engine for the reference design
lm_last_gen (2) This module generates a lm_lastn signal for
local_master
local_master (2) This module initiates master transactions from the local side.
The DMA engine triggers the state machine inside
local_master .
local_target The module consists of a simple target state machine that
performs 32 or 64-bit memory read/write transactions with
the LPM memory and 32-bit single-cycle IO read/write
transactions with an I/O register defined in the local target
prefetch This module is used to prefetch the data from a memory
block during burst target read transactions and burst master
write transactions.
lpm_ram_32 This module is used to instantiate 1 KByte of RAM. This RAM
is accessible by both
local_target and
local_master .
local_top This module instantiates all the local reference design
modules.
Notes to Table 4–2 :
(1) All files are provided in both VHDL and Verilog HDL.
(2) Not applicable to the pci_t32 and pci_t64 MegaCore functions.