Altera PCI Compiler - Manual (Page 117)

Altera Corporation User Guide Version 11.1 3–43
October 2011
Functional Description
format of the Interrupt Line Register.
1 The interrupt pin can be enabled or disabled in the wizard. The
interrupt pin register will be set to 0x00 if the interrupt option is
disabled in the Parameterize - PCI Compiler wizard.
Interrupt Pin Register
The interrupt pin register is an 8-bit read-only register that defines the
PCI function PCI bus interrupt request line to be intan. The default
value of the interrupt pin register is 0x01. Refer to
Table 3–31 .
Minimum Grant Register
The minimum grant register is an 8-bit read-only register that defines the
length of time the function would like to retain mastership of the PCI bus.
The value set in this register indicates the required burst period length in
250-ns increments. You can set this register through the wizard. Refer to
Table 3–32 .
Table 3–30. Interrupt Line Register Format
Data Bit Mnemonic Read/Write Definition
7..0 int_ln Read/write Interrupt line register
Table 3–31. Interrupt Pin Register Format
Data Bit Mnemonic Read/Write Definition
7..0 int_pin Read Interrupt pin register
Table 3–32. Minimum Grant Register Format
Data Bit Mnemonic Read/Write Definition
7..0 min_gnt Read Minimum grant register