Altera PCI Compiler - Manual (Page 128)

3–54 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
Target Mode Operation
Figure 3–8. Zero-Wait State Burst Memory Read Target Transaction
Note to Figure 3–8 :
(1) This signal is not applicable to the pci_mt32 or pci_t32 MegaCore functions.
lt_framen
lt_ackn
lt_dxfrn
lt_tsr[11..0] 000 381 781 000
lt_rdyn
ad[31..0]
(1) ad[63..32]
cben[3..0]
(1) cben[7..4]
par
(1) par64
framen
(1) req64n
irdyn
devseln
(1) ack64n
trdyn
stopn
l_adro[31..0]
l_cmdo[3..0]
l_adi[31..0]
clk
(1) l_adi[63..32]
Adr
6
Adr-PAR
Z
Adr
6
Z
BE0_L
BE0_H
Z
D0_L
D0_H
D0_L
D0_H
D0-L-PAR
D0-H-PAR
D1_L
D1_H
D2_L
D2_H
D3_L
D3_H
D4_L
D4_H
D1_L
D1_H
D2_L
D2_H
D3_L
D3_H
D1-L-PAR
D1-H-PAR
D2-L-PAR
D2-H-PAR
D3-L-PAR
D3-H-PAR
13 2 3 4 5 6 7 9 10 12 8 11 1
BE1_L BE2_L BE3_L
BE2_H BE3_H BE1_H BE0_H