Altera PCI Compiler - Manual (Page 19)

Altera Corporation User Guide Version 11.1 7
October 2011
About PCI Compiler
Figure 1 shows a PCI-to-DDR2 SDRAM controller interface design using
the PCI Compiler with MegaWizard Plug-in Manager flow; shaded areas
represent user-customized blocks.
Figure 1. PCI-to-DDR2 SDRAM Design Using the PCI Compiler With MegaWizard Flow
f
For more information about the PCI Compiler with MegaWizard flow,
refer to
Chapter 1, Getting Started .
PCI Compiler With SOPC Builder Flow
With this flow, you specify system components and choose system
options from a rich set of features, and the SOPC Builder then
automatically generates the interconnect logic and simulation
environment. Thus, you define and generate a complete system in
dramatically less time than manually integrating separate IP blocks.
1 This flow is recommended for users who are new to the PCI
Compiler or whose highest priority is to minimize design time.
Master
Control
Logic
Backend User Design
Altera
PCI
MegaCore
Function
PCI
Bus
Altera PCI MegaCore Function Local-Side, Low Level Interface
DDR2 SDRAM Memor
y Module
DMA
Engine
Target
Control
Logic
Data
Path
FIFOs
DDR2
SDRAM
Controller
Interface
Altera FPGA
Altera
DDR2
SDRAM
Controller
MegaCore
Function