Altera CPRI IP Core - Manual (Page 94)

5–2 Chapter 5: Testing Features
PRBS Generation and Validation
CPRI MegaCore Function December 2013 Altera Corporation
User Guide
By default, only an REC master can function correctly in a CPRI link external
loopback configuration. However, Altera provides an L1 layer testing feature that
supports RE slave testing in a CPRI link external loopback configuration. Refer to
“Achieving Link Synchronization Without an REC Master” on page 5–4 .
Internal Reverse Loopback
The CPRI IP core supports two different internal reverse loopback paths that you can
configure in software in a CPRI RE slave, and multiple loopback modes along those
paths. The following sections describe these modes.
Physical Layer Loopback Mode
In the physical layer reverse loopback mode, a CPRI RE slave sends CPRI frames of
incoming CPRI data and control words from the PHY module back through the PHY
module in outgoing CPRI communication. The PHY reverse loopback path is labeled
(2) in Figure 5–1 .
In this mode, the PHY reverse loopback path is active whether or not frame
synchronization has been achieved. The path includes 8B10B encoding and decoding,
but only enough core CPRI functionality to handle the transition from the receiver
clock domain to the transmitter clock domain.
You configure a CPRI RE slave in physical layer loopback mode by setting the
loop_mode bit in the CPRI_PHY_LOOP register described in Table 7–13 on page 7–7 . If
this bit is set, the reverse loopback path through the CPRI Rx and Tx buffers is not
active, irrespective of any setting that should activate that path.
Reverse Loopback Through CPRI Rx and Tx Buffers
The CPRI IP core provides support for an additional, more comprehensive testing
loopback path in several different modes. The testing loopback modes activate a
reverse loopback path that sends incoming CPRI communication from the CPRI Rx
buffer back through the CPRI Tx buffer and the PHY module to the CPRI link in
outgoing CPRI communication. This testing loopback path is labeled
(3) in Figure 5–1 .
Several loopback modes are available on this reverse loopback path. You can specify
that full CPRI frames, including all incoming CPRI data and control words, are sent
back in outgoing CPRI communication. You can also specify that only data be looped
back, or that only certain categories of control words be looped back. In these modes,
the CPRI RE slave generates the remainder of the outgoing CPRI frame content
locally.
You configure a CPRI RE slave in testing loopback mode by setting the appropriate
value in the
loop_mode field of the CPRI_CONFIG register described in Table 7–6 on
page 7–4 . The register description includes the full encodings to specify the different
loopback mode values.
PRBS Generation and Validation
The CPRI IP core supports generation and validation of several predetermined
pseudo-random binary sequences (PRBS) for antenna-carrier interface and Rx and Tx
path testing.