Altera CPRI IP Core - Manual (Page 170)

C–8 Appendix C: CPRI Autorate Negotiation Testbench
Running the Autorate Negotiation Testbench
CPRI MegaCore Function December 2013 Altera Corporation
User Guide
6. If you are using the ModelSim SE or ModelSim AE simulator, turn off simulation
optimization by performing the following steps:
a. In the ModelSim simulator, on the Compile menu, click Compile Options. The
Compiler Options dialog box appears.
b. Perform one of the following actions:
i. If you are using the ModelSim SE simulator, on the VHDL tab and on the
Verilog & System Verilog tab, turn off Use vopt flow and turn on Disable
optimizations by using -O0 .
ii. If you are using the ModelSim AE simulator, on the VHDL tab and on the
Verilog & System Verilog tab, turn on Disable optimizations by using
-O0 .
c. Click Apply.
d. Click OK.
7. If you are using the Synopsys VCS MX simulator, perform the following steps:
a. Copy the file synopsys_sim.setup from the
<working dir>/cpri_top_level_sim/synopsys/vcsmx directory to the
<working dir>/cpri_top_level_testbench/altera_cpri/autorate_design/synopsy
s
directory.
b. If you are running either of the 28-nm device variation testbenches, open the
file
<working dir>/cpri_top_level_testbench/altera_cpri/autorate_design/synopsy
s/synopsys_sim.setup
in a text editor and add the xcvr_reconfig_cpri library
path to the file by copying in the following command line from the file
<working dir>/cpri_top_level_testbench/altera_cpri/autorate_design/xcvr_rec
onfig_cpri_sim/synopsys/vcsmx/synopsys_sim.setup
:
xcvr_reconfig_cpri: ./libraries/xcvr_reconfig_cpri/
8. If you are using the Cadence NCSIM simulator, perform the following steps:
a. Copy the directory cds_libs and the files cds.lib and hdl.var from the
<working dir>/cpri_top_level_sim/cadence directory to the
<working dir>/cpri_top_level_testbench/altera_cpri/autorate_design/cadence
directory.
b. If you are running either of the 28-nm device variation testbenches, open the
file
<working dir>/cpri_top_level_testbench/altera_cpri/autorate_design/autorate
_design/cadence/cds.lib
in a text editor and add the xcvr_reconfig_cpri library
path to the file by copying in the following command line from the file
<working dir>/cpri_top_level_testbench/altera_cpri/autorate_design/xcvr_rec
onfig_cpri_sim/cadence/cds.lib
:
DEFINE xcvr_reconfig_cpri ./libraries/xcvr_reconfig_cpri/
c. If you are running either of the 28-nm device variation testbenches, copy the
file xcvr_reconfig_cpri.cds.lib from the
<working dir>/cpri_top_level_sim/cadence/cds_libs directory to the
<working dir>/cpri_top_level_testbench/altera_cpri/autorate_design/xcvr_rec
onfig_cpri_sim/cadence/cds_libs
directory.