Altera CPRI IP Core - Manual (Page 79)

Chapter 4: Functional Description 4–47
CPU Interface
December 2013 Altera Corporation CPRI MegaCore Function
User Guide
After you update the control transmit table with the control bytes, to insert the data in
the next outgoing CPRI frame, make sure you set the
tx_ctrl_insert_en field of the
CPRI_CONFIG register to the value of 1 as specified in the instructions.
Control Word Retrieval Example
To retrieve the vendor-specific portion of a control word in the most recent received
hyperframe, perform the following steps:
1. Identify the indices for the vendor-specific portion of the transmit control table,
using the formula X = Ns + 64 × Xs.
In the example, Ns = 16 and Xs = 0,1,2, and 3. Therefore, the indices to be read are
16, 80, 144, and 208.
2. For each value X in 16, 80, 144, and 208, perform the following steps:
a. Write the value X to the cpri_ctrl_index field of the CPRI_CTRL_INDEX register.
b. Reset the cpri_ctrl_position field of the CPRI_CTRL_INDEX register to the
value of zero.
c. In the following cpu_clk cycle, read the first 32-bit section of the control word
in the CPRI_RX_CTRL register, as shown in Table 4–14 .
d. If the CPRI line rate is greater than 2.4576 Gbps, increment the
cpri_ctrl_position field of the CPRI_CTRL_INDEX register to the value of 1 and
in the following cpu_clk cycle, read the second 32-bit section of the control
word in the CPRI_RX_CTRL register.
e. If the CPRI line rate is greater than 4.9152 Gbps, increment the
cpri_ctrl_position field of the CPRI_CTRL_INDEX register to the value of 2 and
in the following cpu_clk cycle, read the third 32-bit section of the control word
in the CPRI_RX_CTRL register.
f. If the CPRI line rate is 9.8304 Gbps, increment the cpri_ctrl_position field of
the CPRI_CTRL_INDEX register to the value of 3 and in the following cpu_clk
cycle, read the fourth 32-bit section of the control word in the CPRI_RX_CTRL
register.
Accessing the Ethernet Channel
If you turn on the Include MAC block parameter, your CPRI IP core includes an
internal Ethernet Media Access Controller (MAC). If you turn off this parameter, an
MII is available for you to connect to your own external Ethernet MAC. In that case,
the internal Ethernet MAC is not available and your application cannot access the
Ethernet registers. If the internal Ethernet MAC is turned off, attempts to access these
registers read zeroes and do not write successfully, as for a reserved register address.
The Ethernet MAC is responsible for processing the Ethernet frame. The Ethernet
MAC unloads the Ethernet frame from the CPRI frame and stages it in the Ethernet
registers, where it is accessible through the CPU interface. The Ethernet MAC also
handles the flow of Ethernet data to the CPRI frame, by loading it from the Ethernet
registers into the Ethernet space in the CPRI hyperframe.