Altera CPRI IP Core - Manual (Page 201)

Appendix E: Delay Measurement and Calibration E–23
Single-Hop Delay Measurement
December 2013 Altera Corporation CPRI MegaCore Function
User Guide
Round-Trip and Cable Delay Calculation Example 2: Two Arria II GX Devices
This example shows the calculation for the case of two link partner CPRI IP cores
configured with autorate negotiation enabled on Arria II GX devices, in a single-hop
configuration, running at CPRI data rate 3.072 Gbps. In both devices, the
cal_en field
of the CPRI_AUTO_CAL register has the value of 0, and the rx_byte_delay field has the
value of 1.
The calculation is identical to the calculation in Example 1, except that the fixed and
transceiver delays are different in Arria II GX devices than in Stratix IV GX devices. In
addition, Example 2 has a different value in the
rx_round_trip_delay register field. In
your own system, the Rx elastic buffer and Tx elastic buffer delays may also vary.
To calculate the round-trip cable delay in this system, perform the steps in
“Round-Trip and Cable Delay Calculation Example 1: Two Stratix IV GX Devices” ,
replacing values according to Table E–9 . The final row of Table E–9 shows the
calculated cable delay.
Table E–9. Example 2 Data and Calculations
Calculation
Component
Delay Component Relevant Register Value or Source Table Delay
Total
(decimal)
Round trip delay rx_round_trip_delay = 0x85 133
REC Tx path delay
T_T4 Table E–6 on page E–14 6.5
18.5
Tx buffer delay tx_ex_buf_delay = 0x46A 8.90
T_txv_TX
tx_bitslipboundaryselect = 0x0
Table E–7 on page E–16
3.1
REC Rx path delay
T_txv_RX
rx_bitslipboundaryselectout = 0x8
Table E–1 on page E–5
5.5
46.75
Rx buffer delay rx_ex_buf_delay = 0x1000 32.25
Calibration pointer cal_pointer = 3 3
Byte alignment rx_byte_delay = 1 1
T_R1 Table E–3 on page E–8 5
T14 (Round trip delay minus REC Tx path delay minus REC Rx path delay) 67.75
RE Tx path delay
T_T4 Table E–6 on page E–14 6.5
18.585
Tx buffer delay tx_ex_buf_delay = 0x46B 8.91
T_txv_TX
tx_bitslipboundaryselect = 0x3
Table E–7 on page E–16
3.175
RE Rx path delay
T_txv_RX
rx_bitslipboundaryselectout = 0x8
Table E–1 on page E–5
5.5
47.35
Rx buffer delay rx_ex_buf_delay = 0x104C 32.85
Calibration pointer cal_pointer = 3 3
Byte alignment rx_byte_delay = 1 1
T_R1 Table E–3 on page E–8 5
Loopback delay on RE slave 1
Toffset (RE Tx path delay + RE Rx path delay + loopback delay) 66.935
Cable delay (T14 minus Toffset) 0.815