Altera CPRI IP Core - Manual (Page 169)

Appendix C: CPRI Autorate Negotiation Testbench C–7
Running the Autorate Negotiation Testbench
December 2013 Altera Corporation CPRI MegaCore Function
User Guide
b. In the MegaWizard Plug-In Manager, edit the existing CPRI IP core variation,
change its CPRI line rate to 1.2288 Gbps, and regenerate to create the DUT.
When you are prompted to generate an example design, turn off Generate
Example Design
and click Generate.
1 Do not generate the example design for the 1.2288 Gbps variation. When
you run the testbench, you simulate the testbench you generated for the
0.6144 Gbps initial variation with the 1.2288 Gbps DUT. This combination
forces the DUT to perform autorate negotiation to synchronize with the
testbench.
c. In the MegaWizard Plug-In Manager, generate an Altera Transceiver
Reconfiguration Controller (Interfaces > Transceiver PHY > Transceiver
Reconfiguration Controller v13.1
) in the file xcvr_reconfig_cpri.vhd, with
Enable channel/PLL reconfiguration turned on.
d. Copy the new <working directory>/xcvr_reconfig_cpri_sim directory into
<working directory>/cpri_top_level_testbench/altera_cpri/autorate_design.
5. If you are running the testbench for an Arria V GT 9.8 Gbps variation, full
compilation automatically generates the appropriate Memory Initialization Files
(.mif) to configure the Altera Transceiver Reconfiguration Controller. However,
you must perform the full compilation at the 6.144 Gbps CPRI line rate, to
generate the .mif for the lower line rate, before you run the testbench at the
9.8304 Gbps line rate.
Altera recommends that you compile Arria V designs with the 64-bit Quartus II
software.
To generate the .mif and prepare for simulation, perform the following steps:
a. On the Processing menu, click Start Compilation.
After compilation completes, the newly generated .mif files
inst_xcvr_channel.mif
and inst_xcvr_txpll0.mif are available in the
reconfig_mif subdirectory of the project.
b. In the MegaWizard Plug-In Manager, edit the existing CPRI IP core variation,
change its CPRI line rate to 9.8304 Gbps, and regenerate to create the DUT.
When you are prompted to generate an example design, turn off Generate
Example Design
and click Generate.
1 Do not generate the example design for the 9.8304 Gbps variation. When
you run the ArriaV GT 9.8 Gbps autorate negotiation testbench, you
simulate the testbench you generated for the 6.144 Gbps initial variation
with the 9.8304 Gbps DUT. This combination forces the DUT to perform
autorate negotiation to synchronize with the testbench.
c. In the MegaWizard Plug-In Manager, generate an Altera Transceiver
Reconfiguration Controller (Interfaces > Transceiver PHY > Transceiver
Reconfiguration Controller v13.1
) in the file xcvr_reconfig_cpri.vhd, with
Enable channel/PLL reconfiguration turned on.
d. Copy the new <working directory>/xcvr_reconfig_cpri_sim directory into
<working directory>/cpri_top_level_testbench/altera_cpri/autorate_design.