Rainbow Electronics W90P710CDG - Manual (Page 76)

W90P710CD/W90P710CDG
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BITS DESCRIPTION
[4:3] COLUMN
Number of column address bits in SDRAM bank 0/1
Indicates the number of column address bits in external SDRAM
bank 0/1.
COLUMN [4:3] Bits
0 0 8
0 1 9
1 0 10
1 1 REVERSED
[2:0] SIZE
Size of SDRAM bank 0/1
Indicates the memory size of external SDRAM bank 0/1
SIZE [2:0] Size of SDRAM （Byte）
0 0 0 Bank disable
0 0 1 2M
0 1 0 4M
0 1 1 8M
1 0 0 16M
1 0 1 32M
1 1 0 64M
1 1 1 REVERSED
Timing Control Registers （SDTIME0/1）
W90P710 offers the flexible timing control registers to control the generation and processing of the
control signals and can achieve you use different speed of SDRAM
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
SDTIME0 0xFFF0_1010 R/W SDRAM bank 0 timing control register 0x0000_0000
SDTIME1 0xFFF0_1014 R/W SDRAM bank 1 timing control register 0x0000_0000