Rainbow Electronics W90P710CDG - Manual (Page 454)

W90P710CD/W90P710CDG
- 454 -
BITS DESCRIPTIONS
[31:11] RESERVED -
[10:8]
PSCKFS2,
PSCKFS1,
PSCKFS0
PSCK Frequency Selection bit 2, 1 and 0.
This selection can adjust power-on /power-offf sequence interval.
They select working clock frequency as following table. Default values
are 05h.
SCKFS0, SCKFS1,
SCKFS2
SCCLK
frequency
000 80MHz
001 40
MHz
010 20 MHz
011 10 MHz
100 5 MHz
101 2.5 MHz
110 1.25 MHz
[6:4]
SCKFS2,
SCKFS1,
SCKFS0
SCCLK Frequency Selection bit 2, 1 and 0.
They select working clock frequency as following table. Default values
are 05h.
SCKFS0, SCKFS1,
SCKFS2
SCCLK
frequency
000 80MHz
001 40
MHz
010 20 MHz
011 10 MHz
100 5 MHz
101 2.5 MHz
110 1.25 MHz
[3] CLKSTPL
Clock Stop voltage Level
0 = SCCLK stops at low if CLKSTP is also set to "0".
1 = SCCLK stops at high if CLKSTP is also set to "1".
[2] CLKSTP
Clock Stop control bit
Setting "1" to this bit stops SCCLK at a voltage level specified by
CLKSTPL (bit 3 of ECR).
[1:0] RESERVED -