Rainbow Electronics W90P710CDG - Manual (Page 38)

W90P710CD/W90P710CDG
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Big endian
In Big endian format, the W90P710 stores the most significant byte of a word at the lowest numbered
byte, and the least significant byte at the highest-numbered byte. So the byte at address 0 of the memory
system connects to data lines 31 through 24.
For a word aligned address A, Fig6.2.3 shows how the word at address A, the half-word at addresses A
and A+2, and the bytes at addresses A, A+1, A+2, and A+3 map on to each other when the D14 pin is
Low.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word at address A
Half-word at address A Half-word at address A+2
Byte at address A Byte at address A+1 Byte at address A+2 Byte at address A+3
Fig6.2.3 Big endian addresses of bytes and half-words within words
6.2.4.2 Connection of External Memory with Various Data Width
The system diagram for W90P710 connecting with the external memory is shown in Fig6.2.4. Below
tables (Table6.2.3 through Table6.2.14) show the program/data path between CPU register and the
external memory using little / big endian and word/half-word/byte access.
Fig6.2.4 Address/Data bus connection with external memory
W90P710