Rainbow Electronics W90P710CDG User Manual

Page 456

W90P710CD/W90P710CDG

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BITS

DESCRIPTIONS

[31:2]

RESERVED -

[1]

SCRST_L

Smart card Reset pin control bit
Software driver controls this bit directly which in turn determines the
SCRST_L signal to the Smart Card. ‘0’ or ‘1’ in this bit drives ‘0’ or ‘1’
respectively on the SCRST_L signal. This feature was first added to
allow the SCRST_L to be pulled high at a quicker rate during the reset
phase to improve testability. However, upon the attempt to further
improve the capability of the Smart Card host, it was found that this bit
holds the key in solving one of the major problems of this design.
Originally, the SCRST_L signal is pulled high automatically after a
fixed period of time (via the use of a hardware counter) when the card
is inserted. However, there have been many cases where this signal
is pulled high even before power is supplied to the card, which is a
clear violation to the ISO 7816 specification. This as a result causes
non valid ATR to be read by the host during the initial insertion of the
card. Earlier versions of this IP rectified this problem by having the
software ignore the invalid ATR during the initial insertion and do
either a warm or cold setup to capture the true ATR on its second try.
This bit allows a lot of flexibility to fix the problem mentioned above.
Software driver now has the ability to determine when the SCRST_L
is to be pulled either high or low, avoiding this problem which has
plagued earlier versions. With this modification, software ensures that
the SCRST_L signal is pulled high only after the power is supplied to
the card, thus allowing the true ATR to be always read during the
initial insertion of the card.

[0]

POWER_SE
Q_SKIP

When the bit is low, it is normal case
When the bit is high, it will skip the power_on/off_seq so it can speed
up the S/W simulation