Rainbow Electronics W90P710CDG - Manual (Page 306)

W90P710CD/W90P710CDG
- 306 -
6.10.3.8 Palette SRAM Build In Self-Test
Lookup Table SRAM Build In Self Test Register (BIST)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
BIST 0xFFF0_80D0 R/W Lookup Table SRAM Build In Self Test 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Reserved FAIL FINISH BISTEN
BITS DESCRIPTIONS
[31:3] Reserved Reserved
[2] FAIL
BIST Fail indicator
0 = SRAM BIST not fail
1 = SRAM BIST fail
[1] FINISH
BIST Finish Status (Read Only)
0 = When BIST enabled, this value means BIST not finished
1 = When BIST enabled, this value means BIST finished, and FAIL
can be referenced
[0] BISTEN
BIST Mode Enable
0 = SRAM is in normal operation.
1 = BIST enabled, SRAM is under BIST test