Rainbow Electronics W90P710CDG - Manual (Page 341)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 341 - Revision B2
UART Divider Latch (Low Byte) Register (UART_DLL)
REGISTER OFFSET R/W DESCRIPTION RESET VALUE
UART_DLL 0x00 R/W Divisor Latch Register (LS) (DLAB = 1) 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Baud Rate Divider (Low Byte)
BITS DESCRIPTIONS
[7:0] Baud Rate Divider (Low Byte) The low byte of the baud rate divider
UART Divisor Latch (High Byte) Register (UART_DLM)
REGISTER OFFSET R/W DESCRIPTION RESET VALUE
UART_DLM 0x04 R/W Divisor Latch Register (MS) (DLAB = 1) 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Baud Rate Divider (High Byte)
BITS DESCRIPTIONS
[7:0] Baud Rate Divider (High Byte) The high byte of the baud rate divider