Rainbow Electronics W90P710CDG - Manual (Page 321)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 321 - Revision B2
The ACTL_IISCON is the IIS basic operation control register.
BITS DESCRIPTIONS
[31:20] Reserved -
[19:16] PRS[3:0]
IIS frequency pre-scaler selection bits. (FPLL is the input PLL
frequency, MCLK is the output main clock)
PSR[3:0]=0000, MCLK=FPLL/1
PSR[3:0]=0001, MCLK=FPLL/2
PSR[3:0]=0010, MCLK=FPLL/3
PSR[3:0]=0011, MCLK=FPLL/4
PSR[3:0]=0100, MCLK=FPLL/5
PSR[3:0]=0101, MCLK=FPLL/6
PSR[3:0]=0110, MCLK=FPLL/7
PSR[3:0]=0111, MCLK=FPLL/8
PSR[3:0]=1000, reserved
PSR[3:0]=1001, MCLK=FPLL/10
PSR[3:0]=1010, reserved
PSR[3:0]=1011, MCLK=FPLL/12
PSR[3:0]=1100, reserved
PSR[3:0]=1101, MCLK=FPLL/14
PSR[3:0]=1110, reserved
PSR[3:0]=1111, MCLK=FPLL/16
(when the division factor is 3/5/7, the duty cycle of MCLK is not
50%, the high duration is 0.5*FPLL)
The PSR[3:0] bits are read/write
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved PRS[3:0]
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
BCLK_SEL[1:0] FS_SEL MCLK_SEL FORMAT Reserved