Rainbow Electronics W90P710CDG - Manual (Page 316)

W90P710CD/W90P710CDG
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BITS DESCRIPTIONS
[31:0] AUDIO_RDST_L[31:0]
32-bit record destination address length
The AUDIO_RDST_L[31:0] bits is read/write.
DMA destination current address (ACTL_RDSTC)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
ACTL_RDSTC 0xFFF0_9010 RO DMA record destination current address 0x0000_0000
The value in ACTL_RDSTC is the DMA record destination current address, this register could only be
read by CPU.
BITS DESCRIPTIONS
[31:0] AUDIO_RDSTC[31:0]
32-bit record destination current address
The AUDIO_RDSTC[31:0] bits is read only.
Audio controller record status register (ACTL_RSR)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
ACTL_RSR 0xFFF0_9014 R/W
Audio controller FIFO and DMA status
register for record
0x0000_0000
31 30 29 28 27 26 25 24
AUDIO_RDSTC[31:24]
23 22 21 20 19 18 17 16
AUDIO_RDSTC[23:16]
15 14 13 12 11 10 9 8
AUDIO_RDSTC[15:8]
7 6 5 4 3 2 1 0
AUDIO_RDSTC[7:0]