FUJITSU MB91F109 FR30 - Manual (Page 416)

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APPENDIX C Pin Status for Each CPU Status
PF2 SC0,
OCPA3 Previous status
retained Previous status
retained Output Hi-Z/
Input fixed to 0 Previous status
retained Output Hi-Z/
Input
allowed for
all pins
PF3 SI1, TRG2
PF4 SO1,
TRG3
PF5 SI2,
OCPA1
PF6 SO2,
OCPA2
PF7 OCPA0,
ATGX
Table C-4 Pin Status in 8-bit External Bus Mode (Continued)
Pin name Function During sleep During stop Bus release
(BGRNT)
Reset time
HIZX=0 HIZX=1
P: when a general-purpose port is specified, F: when the specified function is selected
*1 Selfrefresh status is entered at selfrefresh start time. When selfrefresh is cleared,
the previous value is retained.
*2 Handled when DRAM pin is set.