FUJITSU MB91F109 FR30 - Manual (Page 404)

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APPENDIX B Interrupt Vectors
UART 2 reception completion 22 16 ICR06 3A4
H
000FFFA4
H
UART 0 send completion 23 17 ICR07 3A0
H
000FFFA0
H
UART 1 send completion 24 18 ICR08 39C
H
000FFF9C
H
UART 2 send completion 25 19 ICR09 398
H
000FFF98
H
DMAC 0 (end, error) 26 1A ICR10 394
H
000FFF94
H
DMAC 1 (end, error) 27 1B ICR11 390
H
000FFF90
H
DMAC 2 (end, error) 28 1C ICR12 38C
H
000FFF8C
H
DMAC 3 (end, error) 29 1D ICR13 388
H
000FFF88
H
DMAC 4 (end, error) 30 1E ICR14 384
H
000FFF84
H
DMAC 5 (end, error) 31 1F ICR15 380
H
000FFF80
H
DMAC 6 (end, error) 32 20 ICR16 37C
H
000FFF7C
H
DMAC 7 (end, error) 33 21 ICR17 378
H
000FFF78
H
A/D (serial) 34 22 ICR18 374
H
000FFF74
H
Reload timer 0 35 23 ICR19 370
H
000FFF70
H
Reload timer 1 36 24 ICR20 36C
H
000FFF6C
H
Reload timer 2 37 25 ICR21 368
H
000FFF68
H
Table B-1 Interrupt Vectors (1/2)
Cause for the interrupt
Interrupt No.
Interrupt
level *1
Offset
TBR default
address *2 Decimal Hexa-
decimal
Table B-2 Interrupt Vectors (2/2)
Interrupt cause
Interrupt number
Interrupt
level *1
Offset
TBR default
address *2 Decimal Hexa-
decimal
PWM 0 38 26 ICR22 364
H
000FFF64
H
PWM 1 39 27 ICR23 360
H
000FFF60
H
PWM 2 40 28 ICR24 35C
H
000FFF5C
H
PWM 3 41 29 ICR25 358
H
000FFF58
H
U-TIMER 0 42 2A ICR26 354
H
000FFF54
H
U-TIMER 1 43 2B ICR27 350
H
000FFF50
H
U-TIMER 2 44 2C ICR28 34C
H
000FFF4C
H
FLASH memory 45 2D ICR29 348
H
000FFF48
H
Reserved for the system 46 2E ICR30 344
H
000FFF44
H