FUJITSU MB91F109 FR30 - Manual (Page 216)

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CHAPTER 4 BUS INTERFACE
■ Automatic Wait Cycle of CBR Refresh
Figure 4.17-36 Example of Timing Chart of CBR Refresh Automatic Wait Cycle
[Explanation of operation]
• When inserting a CBR refresh automatic wait cycle, set the R3W bit of the RFCR.
■ Selfrefresh
Figure 4.17-37 Example of Selfrefresh Timing Chart
[Explanation of operation]
• Set the SLFR bit of DMCR4 or DMCR5 to "1" to start selfrefresh and set "0" to release it.
• When the selfrefresh ends, at least seven idle cycles are inserted.
• In this manual, selfrefresh is represented by "SR1 to SR3".
R1 R1W R2 R3 R3W R4 idle
CLK
RAS
CAS
wait wait
SR1 SR2 SR3 SR3 SR3 idle
CLK
SLFR bit
RAS
CAS