FUJITSU MB91F109 FR30 - Manual (Page 118)

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CHAPTER 3 CLOCK GENERATOR AND CONTROLLER
L level application to RSTX pin --> occurrence of internal reset --> restart of oscillation
circuit operation --> wait for oscillation stabilization --> restart of internal peripheral clock
supply after stabilization --> restart of internal DMA clock supply --> restart of internal
bus clock supply --> restart of internal CPU clock supply --> reset vector fetch --> restart
of instruction execution from reset entry address
• If a peripheral interrupt request has already been issued when 1 is written to STCR register
bit 7, the writing is ignored and transition to the stop state does not occur.
• After power-on resetting, every internal clock is supplied to initialize the internal states.
However, after resetting other than power-on resetting, no internal clock is supplied during
the oscillation stabilization wait time.
• When transition to the sleep state has occurred because of a C-bus RAM program, do not
use an interrupt but use resetting to return from the sleep state.