FUJITSU MB91F109 FR30 - Manual (Page 306)

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CHAPTER 12 16-BIT RELOAD TIMER
12.1 Overview of 16-bit Reload Timer
The 16-bit reload timer consists of a 16-bit decrementing counter, 16-bit reload
register, internal count clock pulse generation prescaler, and control register.
An input clock can be selected from three types of internal clock frequencies (machine
clock frequency divided by 2, 8, or 32).
An interrupt can be used to start DMA transfer.
The MB91F109 contains three channels of 16-bit reload timer.
The channel-2 T0 output of the reload timer is connected to the A/D converter inside
the LSI chip. Therefore, A/D conversion can be started periodically as specified in the
reload register.
■ 16-Bit Reload Timer Registers
Figure 12.1-1 shows the 16-bit reload timer registers.
Figure 12.1-1 16-Bit Reload Timer Registers
15 14 13 12 11 10 9 8
(TMCSR)
CSL1 CSL0 MOD2 MOD1
7 6 5 4 3 2 1 0
MOD0 OUTE OUTL RELD INTE UF CNTE TRG
15 0
(TMR)
15 0
(TMRLR)
Control status register
16-bit timer register
16-bit reload register