FUJITSU MB91F109 FR30 - Manual (Page 237)

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6.2 Enable Interrupt Request Register (ENIR)
6.2 Enable Interrupt Request Register (ENIR)
The enable interrupt request register (ENIR) is used to mask the output of an external
interrupt request.
■ Enable Interrupt Request Register (ENIR)
The configuration of the enable interrupt request register (ENIR) is shown below:
The enable interrupt request register (ENIR) is used to mask the output of an external interrupt
request.
The output of the interrupt requests corresponding to the register bits set to "1" is enabled (EN0
enables INT0), and the requests are output to the interrupt controller. The pins corresponding
to the bits set to "0" retain interrupt causes but issue no request to the interrupt controller.
For this device, writing to bits EN4 to EN7 has no effect. Write 0 to these bits.
No mask bits are provided for nonmaskable interrupts (NMI).
7 6 5 4 3 2 1 0
ENIR
Address:000095
H
EN7 EN6 EN5 EN4 EN3 EN2 EN1 EN0 00000000 R/W
Initial value Access