FUJITSU MB91F109 FR30 - Manual (Page 23)

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Table A-4 I/O Map (4/6) ........................................................................................................................... 375
Table A-5 I/O Map (5/6) ........................................................................................................................... 376
Table A-6 I/O Map .................................................................................................................................... 377
Table B-1 Interrupt Vectors (1/2) .............................................................................................................. 379
Table B-2 Interrupt Vectors (2/2) .............................................................................................................. 380
Table C-1 Explanation of Terms Used in the Pin Status List ................................................................... 383
Table C-2 Pin Status for 16-bit External Bus Length and 2CA1WR Mode .............................................. 384
Table C-3 Pin Status for 16-bit External Bus Length and 2CA1WR Mode .............................................. 387
Table C-4 Pin Status in 8-bit External Bus Mode .................................................................................... 390
Table C-5 Pin Status in Single Chip Mode .............................................................................................. 393
Table E-1 Explanation of Addressing Mode Codes ................................................................................. 405
Table E-2 Instruction Formats .................................................................................................................. 407
Table E.1-1 Addition and Subtraction Instructions ...................................................................................... 410
Table E.1-2 Compare Operation Instructions .............................................................................................. 410
Table E.1-3 Logical Operation Instructions ................................................................................................. 411
Table E.1-4 Bit Operation Instructions ........................................................................................................ 411
Table E.1-5 Multiplication and Division Instructions .................................................................................... 412
Table E.1-6 Shift Instructions ...................................................................................................................... 412
Table E.1-7 Immediate Value Setting or 16/32-Bit Immediate Value Transfer Instruction .......................... 413
Table E.1-8 Memory Load Instructions ....................................................................................................... 413
Table E.1-9 Memory Store Instructions ....................................................................................................... 414
Table E.1-10 Interregister Transfer Instructions ............................................................................................ 414
Table E.1-11 Standard Branch (Without Delay) Instructions ........................................................................ 415
Table E.1-12 Delayed Branch Instructions ................................................................................................... 416
Table E.1-13 Other Instructions ................................................................................................................... 417
Table E.1-14 20-Bit Standard Branch Macro Instructions ............................................................................. 418
Table E.1-15 20-Bit Delayed-Branch Macro Instructions .............................................................................. 419
Table E.1-16 32-Bit Standard Branch Macro Instructions ............................................................................. 420
Table E.1-17 32-Bit Delayed-Branch Macro Instructions .............................................................................. 421
Table E.1-18 Direct Addressing Instructions ................................................................................................ 422
Table E.1-19 Resource Instructions ............................................................................................................. 422
Table E.1-20 Coprocessor Control Instructions ........................................................................................... 423