FUJITSU MB91F109 FR30 - Manual (Page 110)

86
CHAPTER 3 CLOCK GENERATOR AND CONTROLLER
3.8 PLL Control Register (PCTR)
The PLL control register (PCTR) is used to control PLL oscillation.
The setting of this register can be changed only when GCR CHC is 1.
■ Configuration of PLL Control Register (PCTR)
The PLL control register (PCTR) is used to control PLL oscillation. The setting of this register
can be changed only when GCR CHC is 1.
■ Bit Functions of PLL Control Register (PCTR)
[bit 15, 14] SLCT1, 0
These bits control PLL multiplying ratios. The bits are initialized only at power-on.
The internal operating frequency applicable when GCR CHC is set to 0 is written to this
register.
[bit 13, 12] Reserved
Always write 0 to these bits.
[bit 11] VSTP
This bit controls PLL oscillation. The bit is initialized only at power-on.
When the system shifts to the stop mode, PLL oscillation stops regardless of the setting of this
bit.
15 14 13 12 11 10 09 08
00000488
H SLCT1 SLCT0 VSTP 00--0--- R/W
Initial value Access
SLCT1 SLCT0 Internal operating frequency (at 12.5 MHz oscillation)
0 0 12.5 MHz operation [Initial value]
0 1 25.0 MHz operation
1 X Reserved
VSTP PLL operation
0 Enable oscillation. [Initial value]
1 Stop oscillation.