FUJITSU MB91F109 FR30 - Manual (Page 236)

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CHAPTER 6 EXTERNAL INTERRUPT/NMI CONTROLLER
6.1 Overview of External Interrupt/NMI Controller
The external interrupt/NMI controller is a block that controls an external interrupt
request input to NMIX or INT0 to INT3.
The levels of interrupt requests to be detected can be selected from "H", "L", and the
"rising" and "falling" edges (excluding NMI).
■ External Interrupt/NMI Controller Registers
Figure 6.1-1 shows the external interrupt/NMI controller registers.
Figure 6.1-1 External Interrupt/NMI Controller Registers
■ External Interrupt/NMI Controller Block Diagram
Figure 6.1-2 is an external interrupt/NMI controller block diagram.
Figure 6.1-2 External Interrupt/NMI Controller Block Diagram
bit 7 6 5 4 3 2 1 0
EN7 EN6 EN5 EN4 EN3 EN2 EN1 EN0
bit 15 14 13 12 11 10 9 8
ER7 ER6 ER5 ER4 ER3 ER2 ER1 ER0
bit 7 6 5 4 3 2 1 0
LB3 LA3 LB2 LA2 LB1 LA1 LB0 LA0
Enable interrupt request register
(ENIR)
External interrupt request register
(EIRR)
External level register (ELVR)
R BUS
INT0 to 3
NMIX
8
9
8
8
5
Enable interrupt request register
Gate
Edge detection
circuit
External interrupt request register
External level register
Interrupt
request
Cause F/F