FUJITSU MB91F109 FR30 - Manual (Page 262)

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CHAPTER 8 INTERRUPT CONTROLLER
Example of interrupt routines
The above example indicates that a priority interrupt is caused during execution of interrupt
routine I. In this case, incrementing PDRR at the beginning of each interrupt routine and
decrementing it at the exit of each routine can also prevent a hold request from being issued
accidentally.
• Always increment PDRR at the beginning of the interrupt routine to be executed during DMA
transfer (in CPU hold state) and decrement it at the exit of the routine to prevent DMA
transfer during execution of the interrupt routine.
• On the other hand, incrementing or decrementing PDRR during execution of an ordinary
interrupt routine prevents DMA transfer during execution of the interrupt routine and may
deteriorate performance.
• Carefully note the relationship between the interrupt levels set in the HRCL and the ICR
registers.
Incrementing PDRR
Clearing the interrupt cause
Decrementing PDRR
RETI