FUJITSU MB91F109 FR30 - Manual (Page 337)

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14.7 General Control Register 1 (GCN1)
[bits 7-4] TSEL 13-10: ch1 trigger input select bits
[bits 3-0] TSEL 03-00: ch0 trigger input select bits
Table 14.7-3 Selection of Ch1 Trigger Input
TSEL13-10 ch1 trigger input
7 6 5 4
0 0 0 0 GCN2 EN0 bit
0 0 0 1 GCN2 EN1 bit (Initial value)
0 0 1 0 GCN2 EN2 bit
0 0 1 1 GCN2 EN3 bit
0 1 0 0 16-bit reload timer channel 0
0 1 0 1 16-bit reload timer channel 1
0 1 1 X Setting prohibited
1 0 0 0 External TRG0
1 0 0 1 External TRG1
1 0 1 0 External TRG2
1 0 1 1 External TRG3
1 1 X X Reserved
Table 14.7-4 Selection of Ch0 Trigger Input
TSEL03-00 ch0 trigger input
3 2 1 0
0 0 0 0 GCN2 EN0 bit (Initial value)
0 0 0 1 GCN2 EN1 bit
0 0 1 0 GCN2 EN2 bit
0 0 1 1 GCN2 EN3 bit
0 1 0 0 16-bit reload timer channel 0
0 1 0 1 16-bit reload timer channel 1
0 1 1 X Reserved
1 0 0 0 External TRG0
1 0 0 1 External TRG1
1 0 1 0 External TRG2
1 0 1 1 External TRG3
1 1 X X Reserved