FUJITSU MB91F109 FR30 - Manual (Page 333)

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14.5 PWM Duty Cycle Setting Register (PDUT)
14.5 PWM Duty Cycle Setting Register (PDUT)
The PWM duty cycle setting register (PDUT) is used to set a duty cycle. This register
has a buffer. A borrow occurring in the counter triggers a transfer from the buffer.
■ PWM Duty Cycle Setting Register (PDUT)
The configuration of the PWM duty cycle setting register (PDUT) is shown below.
When the same value is set in the cycle setting register and duty cycle setting register, output is
kept at a high level in normal polarity mode or output is kept at a low level in inverse polarity
mode.
To ensure stable PWM output, set values that make PCSR smaller than PDUT.
Use a 16-bit data instruction to access the cycle setting register.
PDUT bit 15 14 13 12 11 10 9 8
Address: ch0 0000E4
H
ch1 0000EC
H
ch2 0000F4
H
ch3 0000FC
H
7 6 5 4 3 2 1 0
Attribute Write only
Initial value Undefined