Altera RapidIO MegaCore Function - Manual (Page 85)

Chapter 4: Functional Description 4–39
Logical Layer Modules
August 2014 Altera Corporation RapidIO MegaCore Function
User Guide
Table 4–9 lists the allowed write-request conversions for RapidIO IP core 2x and 4x
variations.
Table 4–9. RapidIO Master Write Transaction Burstcount and Byteenable (64-Bit Datapath)
RapidIO Values Avalon-MM Values
wrsize
(4'bxxxx)
wdptr
(1'bx)
Maximum
Burstcount (1)
Byteenable (8’bxxxxxxxx)
0000
0 1 1000_0000
1 1 0000_1000
0001
0 1 0100_0000
1 1 0000_0100
0010
0 1 0010_0000
1 1 0000_0010
0011
0 1 0001_0000
1 1 0000_0001
0100
0 1 1100_0000
1 1 0000_1100
0101
0 (2) 1 1110_0000
1 (2) 1 0000_0111
0110
0 1 0011_0000
1 1 0000_0011
0111
0 (2) 1 1111_1000
1 (2) 1 0001_1111
1000
0 1 1111_0000
1 1 0000_1111
1001
0 (2) 1 1111_1100
1 (2) 1 0011_1111
1010
0 (2) 1 1111_1110
1 (2) 1 0111_1111
1011
0 1 1111_1111
1 2 1111_1111
1100
0 4 1111_1111
1 8 1111_1111
1101
0 (3) — —
1 16 1111_1111
1110
0 (3) — —
1 (3) — —
1111
0 (3) — —
1 32 1111_1111
Notes to Table 4–9 :
(1) If the maximum burst count is larger than 2, the actual burst count depends on the size of the payload in the
received request packet.
(2) This combination of wdptr and wrsize values should be avoided, because the resulting byteenable value is not
allowed by the Avalon-MM specification.
(3) This combination of wdptr and wrsize values is reserved. If this combination is received, the RapidIO IP core
declares an error.