Altera RapidIO MegaCore Function - Manual (Page 67)

Chapter 4: Functional Description 4–21
Transport Layer
August 2014 Altera Corporation RapidIO MegaCore Function
User Guide
Packets with a destination ID different from the content of the relevant Base Device ID
CSR ID field are routed to the Avalon-ST pass-through interface, unless you disable
destination ID checking and the packet is a request packet with a tt field that matches
the device ID width setting of the IP core. If you disable destination ID checking, the
packet is a request packet with a supported ftype, and the tt field matches the device
ID width setting of the current RapidIO IP core, the packet is routed to the
appropriate Logical layer.
■ Packets with unsupported ftype are routed to the Avalon-ST pass-through
interface. Request packets with a supported ftype and a tt value that matches the
RapidIO IP core’s device ID width, but an unsupported ttype are routed to the
Logical layer supporting the ftype. The Logical layer module then performs the
following tasks:
■ Sends an ERROR response for request packets that require a response.
■ Records an unsupported_transaction error in the Error Management
extension registers.
■ Packets that would be routed to the Avalon-ST pass-through interface, in the case
that the RapidIO IP core does not implement an Avalon-ST pass-through interface,
are dropped. In this case, the Transport layer module asserts the
rx_packet_dropped
signal.
■ ftype =13 response packets are routed based on the value of their target
transaction ID (targetTID) field. Each Logical layer module is assigned a range of
transaction IDs (
Table 4–4 specifies these ranges). If the transaction ID of a
received response packet is not within one of the ranges assigned to one of the
enabled Logical layer modules, the packet is routed to the pass-through interface.
Packets marked as errored by the Physical layer (for example, packets with a CRC
error or packets that were stomped) are filtered out and dropped from the stream of
packets sent to the Logical layer modules or pass-through interface. In these cases, the
rx_packet_dropped
output signal is not asserted.
Transaction ID Ranges
To limit the required storage, a single pool of transaction IDs is shared between all
destination IDs, although the RapidIO specification allows for independent pools for
each Source-Destination pair. Further simplifying the routing of incoming ftype=13
response packets to the appropriate Logical layer module, the Input-Output
Avalon-MM slave module and the Doorbell Logical layer module are each assigned
an exclusive range of transaction IDs that no other Logical layer module can use for
transmitted request packets that expect an ftype=13 response packet.
Table 4–4 shows
the transaction ID ranges assigned to various Logical layers.
Table 4–4. Transaction ID Ranges and Assignments (Part 1 of 2)
Range Assignments
0–63
This range of Transaction IDs is used for ftype=8 responses by the Maintenance Logical layer
Avalon-MM slave module.
64–127
ftype=13 responses in this range are reserved for exclusive use by the Input-Output Logical layer
Avalon-MM slave module.