Altera RapidIO MegaCore Function User Manual
Page 189

August 2014
Altera Corporation
RapidIO MegaCore Function
User Guide
C. Porting a RapidIO Design from the
Previous Version of the Software
This appendix describes how to port your RapidIO design from the previous version
of the RapidIO IP core and Quartus II software.
Upgrading a RapidIO Design Without Changing Device Family
To upgrade your RapidIO design that you developed and generated using the
RapidIO IP core v13.1, to the IP core v14.0, perform the following steps:
1. Follow the IP upgrade instructions in the “Upgrading Outdated IP Cores” section
cores unsupported by automatic upgrade.
Note the new device support restrictions and the fact that the RapidIO IP core no
longer supports Physical layer only variations or external transceivers. To upgrade
a RapidIO IP core variation that is no longer supported, you must regenerate it
with v14.0 supported parameter values.
2. Proceed with simulation, adding the RapidIO timing constraints, and compilation.
1
Before you add the RapidIO timing constraints, use the Assignment Editor
to remove the old 0PPM assignments for this IP core. Otherwise, the new
0PPM settings are not written.
Upgrading a RapidIO Design to the Arria 10 Device Family
To upgrade your RapidIO design that you developed and generated to target another
device family, to the newly supported Arria 10 device family, you must manually
reparameterize and regenerate the RapidIO IP core.
Other IP cores in the design might have a migration path to the Arria 10 device family.
Refer to
The Arria 10 device family supports different transceiver connections than previous
device families. You will need to modify your design accordingly, including the
addition of new supporting IP cores. The value you specify for the new parameter
Enable transceiver dynamic reconfiguration
affects the extent of the new ports. Refer
to
.
The Arria 10 device family supports fewer distinct variations of the RapidIO IP core
than previous device families. If your design includes a RapidIO IP core that does not
conform to any of the following restrictions, you must modify the design to
accomodate a different RapidIO IP core variation. After you generate the new
RapidIO IP core variation, you must connect any resulting new signals and redesign
to remove connections to any newly removed signals in your Arria 10 design.
RapidIO IP cores that support an Arria 10 device in the Quartus II 14.0 Arria 10
Edition software have the following new restrictions: