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Interoperability testing, Performance and resource utilization, Interoperability testing –6 – Altera RapidIO MegaCore Function User Manual

Page 14: Performance and resource utilization –6

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1–6

Chapter 1: About This MegaCore Function

Performance and Resource Utilization

RapidIO MegaCore Function

August 2014

Altera Corporation

User Guide

NREAD

s of various size payloads—4 bytes to 256 bytes

NWRITE

s of various size payloads—4 bytes to 256 bytes

NWRITE_R

s of a few different size packets

SWRITE

s

Port-writes

DOORBELL

messages

MAINTENANCE

reads and writes

The hardware tests also cover the following control symbol types:

Status

Packet-accepted

Packet-retry

Packet-not-accepted

Start-of-packet

End-of-packet

Link-request, Link-response

Stomp

Restart-from-retry

Multicast-event

Interoperability Testing

Altera performs interoperability tests on the RapidIO IP core, which certify that the
RapidIO IP core is compatible with third-party RapidIO devices.

Altera performs interoperability testing with processors and switches from various
manufacturers including:

Texas Instruments Incorporated

Integrated Device Technology, Inc. (IDT)

Testing of additional devices is an on-going process.

In addition, the RapidIO IP core v9.0 successfully passed RIOLAB’s Device
Interoperability Level-3 (DIL-3) testing in 2009.

Performance and Resource Utilization

This section contains tables showing IP core variation size and performance examples.

Table 1–3

lists the resources and expected performance for selected variations that use

these modules:

Physical layer

Transport layer

Input/Output Avalon-MM master and slave