Altera RapidIO MegaCore Function - Manual (Page 10)

1–2 Chapter 1: About This MegaCore Function
Features
RapidIO MegaCore Function August 2014 Altera Corporation
User Guide
New Features in the RapidIO IP Core v14.0 and v14.0 Arria 10 Edition
Releases
The RapidIO IP core v14.0 Arria 10 Edition adds the following new feature:
■ Support for Arria 10 devices
The RapidIO IP core v14.0 adds the following new features:
■ All RapidIO IP core variations have a Transport layer.
■ All RapidIO IP core variations include configuration of the high-speed
transceivers on the device.
For details about changes to the IP core, refer to “Document Revision History” on
page Info–1 . For an overview, refer to the RapidIO IP core chapter in the Altera
MegaCore IP Library Release Notes . IP core variations that target an Arria 10 device have
additional interfaces and design requirements.
f For information about the new Altera IP design flow in the Quartus II software v14.0
and v14.0 Arria 10 Edition, which impacts all Altera IP cores, refer to the
“Introduction to Altera IP Cores” section in the “Managing Quartus II Projects”
chapter in
Volume 1: Design and Synthesis of the Quartus II Handbook and to Introduction
to Altera IP Cores .
The RapidIO IP core v13.1 does not add any new features.
RapidIO IP Core Features
The RapidIO IP core has the following features:
■ Compliant with RapidIO Trade Association, RapidIO Interconnect Specification,
Revision 2.1, August 2009, available from the RapidIO Trade Association website
at
www.rapidio.org
■ Successfully passed RIOLAB’s Device Interoperability Level-3 (DIL-3) testing
■ Supports 8-bit or 16-bit device IDs
■ Supports incoming and outgoing multi-cast events