Altera RapidIO MegaCore Function - Manual (Page 76)

4–30 Chapter 4: Functional Description
Logical Layer Modules
RapidIO MegaCore Function August 2014 Altera Corporation
User Guide
■ config_offset is generated by using the values programmed in the Tx
Maintenance Address Translation Window registers, as described in Table 6–28
through Table 6–35 .
■ wdptr
Each window is enabled if the window enable (WEN) bit of the Tx Maintenance Window
n Mask register (
Table 6–30 on page 6–18 ) is set. Each window is defined by the
following registers:
■ A base register: Tx Maintenance Mapping Window n Base ( Table 6–29 on page 6–18 )
■ A mask register: Tx Maintenance Mapping Window n Mask ( Table 6–30 )
■ An offset register: Tx Maintenance Mapping Window n Offset ( Table 6–31 )
■ A control register: Tx Maintenance Mapping Window n Control ( Table 6–32 )
For each defined and enabled window, the Avalon-MM address's least significant bits
are masked out by the window mask and the resulting address is compared to the
window base. If the addresses match, config_offset is created based on the
following equation:
If (mnt_s_address[23:1] & mask[25:3]) == base[25:3]
then config_offset = (offset[23:3] & mask[23:3])|
(mnt_s_address[21:1] & ~mask[23:3])
where:
■ mnt_s_address[23:0] is the Avalon-MM slave interface address
■ config_offset[20:0] is the outgoing RapidIO register double-word offset
■ base[31:0] is the base address register
■ mask[31:0] is the mask register
■ offset[23:0] is the window offset register
If the address matches multiple windows, the lowest number window register set is
used.
The following fields are inserted from the control register of the mapping window
that matches.
■ prio
■ dest_id
■ hop_count
The tt value is determined by your selection of device ID width at the time you create
this RapidIO IP core variation. The source_tid is generated internally and the wdptr
is assigned the negation of mnt_s_address[0].
For a MAINTENANCE Avalon-MM slave write, the value on the mnt_s_writedata[31:0]
bus is inserted in the payload field of the MAINTENANCE write packet.
Maintenance Master Processor
This module performs the following tasks:
■ For a MAINTENANCE read, converts the received request packet to an Avalon read
and presents it across the Maintenance Avalon-MM master interface.