Achronix Speedster22i User Macro Guide - Manual (Page 66)

Registers DFF
Speedster22i Macro Cell Library Achronix Semiconductor Proprietary PAGE 50
Parameters
Table 2-2: Parameters
Parameter Defined Values Default Value
init 1’b0
init
The init parameter defines the initial value of the output of the DFF register. This is the value
the register takes upon the initial application of power to the FPGA. The default value of the
init parameter is 1’b0.
Table 2-3: Function Table
Inputs Output
d ck q


Verilog Instantiation Template
DFF #(.init(1’b0))
instance_name
(.q(user_out),
.d(user_din),
.ck(user_clock));
VHDL Instantiation Template
------------- ACHRONIX LIBRARY ------------
library speedster22i;
use speedster22i.components.all;
------------- DONE ACHRONIX LIBRARY ---------
-- Component Instantiation
DFF_instance_name : DFF
generic map ( init => ‘0’)
port map (q => user_out,
d => user_din,
ck => user_clock);
1’b0, 1’b1
0 0
1 1