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Speedster22i Interlaken
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Achronix Speedster22i Interlaken User Manual
Speedster22i interlaken user guide
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Speedster22i
Interlaken User Guide
UG032 – May 15, 2014
UG032, May 15, 2014
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51
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Table of contents
Document Outline
Hierarchy
Typical Operation
Flow Control
Start-Up Procedure
Clocking
TX LBUS Interface
Data Formatting
Packet Mode
Segment Mode
Use of tx_bctlin
RX LBUS Interface
Status/Control Interface
RX Meta Frame Status
RX Error Status
CRC32 Diagnostics Checking
Interlaken Status Messaging for the Receiver
Interlaken Status Messaging for the Transmitter
Transmitter Multiple-Use Bits
Receiver Multiple-Use Bits
Transmitter Flow-Control Inputs
Register Interface
Lane Decommission
Disabling Consecutive Lanes
Consecutive Transmit Lanes
Consecutive Receive Lanes
Disabling a Single Lane
Single Transmit Lane
Single Receive Lane
Link Level Flow Control
TX Rate Limiting
Example: Programming the Rate Limiter
Error Handling
Revision History
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