Achronix Speedster22i User Macro Guide - Manual (Page 195)

Multipliers BMACC56
Speedster22i Macro Cell Library Achronix Semiconductor Proprietary PAGE 178
regce_priority_dout
The regce_priority_dout parameter defines the priority of the ce_dout clock enable input
relative to the rst_dout reset input during an assertion of the rst_dout reset input on the Dout
Output Register and Cout Output Register. Setting regce_priority_dout to “rstreg” allows the
Dout Output Register and Cout Output Register to be set/reset at the next active edge of the
clock without requiring the ce_dout clock enable input to be active. Setting
regce_priority_dout to “regce” requires that the ce_dout clock enable input is high for the
reset operation to occur at the next active edge of the clock. The default value of the
regce_priority_dout parameter is “regce”.
reg_a
The reg_a parameter defines if the Data Input A Input Register is used or bypassed. Setting
reg_a to 1’b0 bypasses the register while setting reg_a to 1’b1 enables the register. The reg_a
parameter defaults to the value 1’b0.
reg_b
The reg_b parameter defines if the Data Input B Input Register is used or bypassed. Setting
reg_b to 1’b0 bypasses the register while setting reg_b to 1’b1 enables the register. The reg_b
parameter defaults to the value 1’b0.
reg_addb
The reg_addb parameter defines if the Add/Sub Addb Input Register is used or bypassed.
Setting reg_addb to 1’b0 bypasses the register while setting reg_addb to 1’b1 enables the
register. The reg_addb parameter defaults to the value 1’b0.
reg_mask_adda
The reg_mask_adda parameter defines if the Adda Mask Input Register is used or bypassed.
Setting reg_mask_adda to 1’b0 bypasses the register while setting reg_mask_adda to 1’b1
enables the register. The reg_mask_adda parameter defaults to the value 1’b0.
reg_dout
The reg_dout parameter defines if the Data Out Output Register is used or bypassed. Setting
reg_dout to 1’b0 bypasses the register while setting reg_dout to 1’b1 enables the register. The
reg_dout parameter defaults to the value 1’b0. Note that for the Speedster22i HP devices that
reg_dout and reg_cout must be set to the same value.
reg_cout
The reg_cout parameter defines if the Carry Out Output Register is used or bypassed. Setting
reg_cout to 1’b0 bypasses the register while setting reg_cout to 1’b1 enables the register. The
reg_cout parameter defaults to the value 1’b0.
sel_cascade_in
The sel_cascade_in parameter defines what is routed to the input of the adda input to the add/
sub block. Setting sel_cascade_in to 1’b0 selects the the dout[55:0] output while setting
sel_cascade_in to 1’b1 selects the cascade_in[55:0] input. The sel_cascade_in parameter
defaults to the value 1’b0.
sel_cascade_out
The sel_cascade_out parameter defines what is routed to the cascade_out output. Setting
sel_cascade_out to 1’b0 selects the the dout[55:0] output while setting sel_cascade_out to 1’b1
selects the output of the conditionally registered output of the multiplier output multiplexer.
The sel_cascade_out parameter defaults to the value 1’b0.