Heading3 - writing to an almost full fifo, Heading3 - reading from an almost empty fifo, Writing to an almost full fifo – Achronix Speedster22i User Macro Guide User Manual
Page 187: Reading from an almost empty fifo
Memories
LRAMFIFO
Speedster22i Macro Cell Library
PAGE 170
Writing to an Almost Full FIFO
Figure 6-40: Writing to an Almost Full FIFO
Reading from an Almost Empty FIFO
Figure 6-41: Reading From an Almost Empty FIFO
wrclk
rdclk
wren
rden
din
almost_full
write_err
1. Almost Full Offset programmed for 5 10-bit words (aempty_offset = 7’h04)
Note: This timing diagram assumes:
2. wptr_sync_stages = 2’b00
wrd 2042 wrd 2043 wrd 2044 wrd 2045
full
wrd 2046 wrd 2047 wrd 2048
A
B
C
D
A
Event : Finish writing 65 words to the FIFO.
Event : The almost_full flag is asserted.
Event : The full flag is asserted four write cycles after almost_full flag is asserted (assuming no reads).
Event : The write_err flag is asserted one wrclk cycle after attempting to write a full FIFO.
B
C
D
wrclk
rdclk
wren
rden
dout
almost_empty
read_err
1. Almost Empty Offset programmed for 6 10-bit words (aempty_offset = 7’h05)
Note: This timing diagram assumes:
2. wptr_sync_stages = 2’b00
wrd 5
empty
A
B
C
D
A
Event : Finish writing 6 words to the FIFO.
Event : The almost_empty flag is deasserted one wrclk plus (wrptr_sync_stages + 3)
B
din
wrd 0 wrd 1
wrd 4
wrd 2 wrd 3 wrd 4 wrd 5
E
F
G
rdclk active clock edges after the sixth (wrd 5) word is presented at the din input
with wren high.
Event : Begin to read the sixth word from the FIFO.
C
Event : The almost_empty flag is asserted the cyle after the first read request, when
D
five words remain in the FIFO.
Event : The empty flag is asserted after the last (sixth) word is read from the FIFO.
E
The rden signal remains high, attempting to read an empty FIFO.
Event : The read_err signal is asserted the cycle after the attempt to read an empty FIFO.
F
The sixth (wrd 5) word remains at the dout output.