Heading3 - read error flag, Heading2 - flag latency, Flag latency – Achronix Speedster22i User Macro Guide User Manual
Page 152

Memories
BRAM80KFIFO
Speedster22i Macro Cell Library
PAGE 135
Read Error Flag
The Read Error (read_err) flag is asserted in the following rdclk clock cycle when the user tries
to read the FIFO while the Empty Flag is high and the Enable Read When Empty
(en_rd_when_empty) parameter is set to 1’b0. The Read Error flag is undefined when the
Enable Read When Empty parameter is set to 1’b1.
Flag Latency
The empty, full, almost_empty, and almost_full flags are calculated based on comparisons
between the FIFO write pointer and the FIFO read pointer. The write pointer is synchronous
to the wrclk domain and the read pointer is synchronous to the rdclk domain. For the case of
an asynchronous FIFO, the wrclk and rdclk clocks reside in different clock domains.
Table 6-35: FIFO Pointers and Status Flag Clock Domain Assignments
Flag
Associated Clock Domain
FIFO Write Pointer
wrclk
FIFO Read Pointer
rdclk
empty flag
rdclk
almost_empty flag
rdclk
full flag
wrclk
almost_full flag
wrclk
Before flag calculations can be made, circuitry has to make sure that both pointers are in the
same clock domain as the flag for which the calculation is done. The Write Pointer
Synchronizer
Figure 6‐10: Write Pointer Synchronizer Block Diagram
Synchronizer
Figure 6‐11: Read Pointer Synchronizer Block Diagram
are used to transfer
each of the pointers into the other clock domain. In order to synchronize a given pointer to the
opposite clock domain, a series of registers, whose depth is determined by the
wrptr_sync_stages and rdptr_sync_stages parameters, is used. The transfer of a pointer
through these registers adds additional delay to the flag calculation. The versions of the
pointers used for flag calculations are shown below in
Table 6‐36: Pointers Used for FIFO
Table 6-36: Pointers Used for FIFO Flag Calculations
Flag
Write Pointer Used for
Flag Calculation
Read Pointer Used for
Flag Calculation
empty flag
Synchronized Write Pointer
Read Pointer
almost_empty flag
Synchronized Write Pointer
Read Pointer
full flag
Write Pointer
Synchronized Read Pointer
almost_full flag
Write Pointer
Synchronized Read Pointer
For example, the empty flag is computed from the Synchronized Write Pointer and the Read
Pointer. The write pointer incurs an additional delay of two to five rdclk cyles (set by the
wrptr_sync_stages parameter) before it is used to calculate the empty flag. Therefore, the
empty flag will not transition from the empty to non‐empty state for a minimum of two rdclk
cycles after the first write to the FIFO occurs. A similar delay occurs for the almost_empty flag
as well. Likewise, for the full and almost_full flags, there are two to five wrclk cycles of delay
in the actual FIFO status due to the synchronized read pointer. For an asyncronous FIFO, the
calculation of the flags does not immediately reflect the state of the FIFO. While this behavior
is normal for asynchronous FIFOs, it should be noted. A synchronous FIFO has only a single
clock, so there is no clock domain crossing required. A synchronous FIFO has the advantage
that the flag calculation is immediate and precise.